Mark 1 FORTH Computer

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19" Rack

IEC Sub-rack
From left to right the cards are:
17 by 16 diode matrix ROM for ALU function decoding
2Instruction decoder & system clock
3Sequencer
4Index register 1
5Index register 2
6RAM/ROM
7I/O
8Stacks
9ALU

Sequencer

Sequencer

Instruction set

00sssdddmovMove source to destination LO
01sssdddmovMove source to destination HI
10000rrrdecDecrement
10001rrrincIncrement
1001aaaajmpJump immediate
1010ffffaluSet ALU function
10110000xopJump to address in operand register
11ffnnnnbne/bcs/bmi/bisConditional skip (f=Flag, n=Distance)

Instruction decoder & system clock

Decoder Cut and strip
System uses 1 MHz quadrature clocks

Index register (1 of 2)

Link configured as W or IP
16-Bit index registers support mov, inc, dec and memory addressing

The 3 R's: RAM/ROM and Reset

With manual reset button
8K Bytes of ROM plus 24K Bytes of RAM

Stacks

Link configured for 6116 or 6264 Pen wired
Dedicated RAM for 256 word (256 word x 16 bit) parameter and return stacks

I/O (Serial & parallel)

Note baud rate jumper Pen wired
8251 UART
8255 PIO (empty socket)

ALU

ALU Top ALU Bottom
8-Bit ALU (dual 74181)

Terminal session

Hyper terminal