Fractional-N Frequency Synthesizer

Design Spectra Loop Filter MASH Simulation Back to projects 15-25 MHz Synthesizer

Latest spectra with C7=10n

N=16, F=0xAE00; 16*256 + 174 = 4270
4270 KHz RB 3Hz
4270 KHz RB 10Hz
The close-in view on the left shows sidebands at the UK 50Hz power line frequency. On the right: noise sidebands peak at 500 Hz either side of the carrier. These humps may be due to under-damping, or insufficient loop bandwidth. My money is on the latter. Noise inside loop bandwidth is that of the reference multiplied; that outside is due to the VCO. In-between is a crossover region where both sources contribute. At large carrier offsets, VCO noise is lower. Noise is minimised if loop bandwidth coincides with the crossover point. So, there's room for improvement.

Additional PFD reset delay

N=17. First accumulator preset to 0x001F. Reset pulse approx 30ns.
4368 KHz F=0x1000
4353 KHz F=0x0100

Spectra without delayed PFD reset

Accumulators reset to 0x0000.
4368 KHz 16-bit accumulators (LSB=1)
4353 KHz 16-bit accumulators (LSB=1)
4368 KHz 8-bit accumulators
4353 KHz 11-bit accumulators
4368 KHz 16-bit accumulators (LSB=1)
4353 KHz 8-bit accumulators